Speed fix From: Jon Smirl --- core/net/sicslowpan.c | 6 +--- core/net/uip6.c | 2 + cpu/mc1322x/isr.c | 52 +++++++++++++++++++------------------ cpu/mc1322x/maca.c | 68 +++++++++++++++++++++++++++---------------------- 4 files changed, 66 insertions(+), 62 deletions(-) diff --git a/core/net/sicslowpan.c b/core/net/sicslowpan.c index 59e4057..541b6db 100644 --- a/core/net/sicslowpan.c +++ b/core/net/sicslowpan.c @@ -54,7 +54,7 @@ #include "net/rime.h" #include "net/sicslowpan.h" -#define DEBUG 1 +#define DEBUG 0 #if DEBUG /* PRINTFI and PRINTFO are defined for input and output to debug one without changing the timing of the other */ u8_t p; @@ -1423,7 +1423,6 @@ input(const struct mac_driver *r) * and rime_hdr_len are non 0, frag_offset is. * If this is a subsequent fragment, this is the contrary. */ -printf("packetbuf_datalen() %d\n", packetbuf_datalen()); rime_payload_len = packetbuf_datalen() - rime_hdr_len; memcpy((void *)SICSLOWPAN_IP_BUF + uncomp_hdr_len + (u16_t)(frag_offset << 3), rime_ptr + rime_hdr_len, rime_payload_len); @@ -1445,9 +1444,8 @@ printf("packetbuf_datalen() %d\n", packetbuf_datalen()); * If we have a full IP packet in sicslowpan_buf, deliver it to * the IP stack */ -printf("processed_ip_len %d sicslowpan_len %d\n", processed_ip_len, sicslowpan_len); if(processed_ip_len == 0 || (processed_ip_len == sicslowpan_len)){ - PRINTFI("sicslowpan input: IP packet ready (length %d)\n", + PRINTF("sicslowpan input: IP packet ready (length %d)\n", sicslowpan_len); memcpy((void *)UIP_IP_BUF, (void *)SICSLOWPAN_IP_BUF, sicslowpan_len); uip_len = sicslowpan_len; diff --git a/core/net/uip6.c b/core/net/uip6.c index f3b20e6..a0cb0fb 100644 --- a/core/net/uip6.c +++ b/core/net/uip6.c @@ -83,7 +83,7 @@ /* For Debug, logging, statistics */ /*---------------------------------------------------------------------------*/ -#define DEBUG 1 +#define DEBUG 0 #if DEBUG #include #define PRINTF(...) printf(__VA_ARGS__) diff --git a/cpu/mc1322x/isr.c b/cpu/mc1322x/isr.c index 2b624f2..f43da6f 100644 --- a/cpu/mc1322x/isr.c +++ b/cpu/mc1322x/isr.c @@ -15,32 +15,32 @@ __attribute__ ((interrupt("IRQ"))) void irq(void) { int pending; - pending = reg32(NIPEND); - - if(bit_is_set(pending, INT_NUM_TMR)) { - /* dispatch to individual timer isrs if they exist */ - /* timer isrs are responsible for determining if they - * caused an interrupt */ - /* and clearing their own interrupt flags */ - if(tmr0_isr != 0) { tmr0_isr(); } - if(tmr1_isr != 0) { tmr1_isr(); } - if(tmr2_isr != 0) { tmr2_isr(); } - if(tmr3_isr != 0) { tmr3_isr(); } - } - if(bit_is_set(pending, INT_NUM_MACA)) { - if(maca_isr != 0) { maca_isr(); } - } - if(bit_is_set(pending, INT_NUM_UART1)) { - if(uart1_isr != 0) { uart1_isr(); } - } - if(bit_is_set(pending, INT_NUM_CRM)) { - PRINTF("crm irq\n\r"); - if(rtc_wu_evt() && (rtc_isr != 0)) { rtc_isr(); } - if(kbi_evnt(4) && (kbi4_isr != 0)) { kbi4_isr(); } - if(kbi_evnt(5) && (kbi5_isr != 0)) { kbi5_isr(); } - if(kbi_evnt(6) && (kbi6_isr != 0)) { kbi6_isr(); } - if(kbi_evnt(7) && (kbi7_isr != 0)) { kbi7_isr(); } - } + while (pending = reg32(NIPEND)) { + if(bit_is_set(pending, INT_NUM_TMR)) { + /* dispatch to individual timer isrs if they exist */ + /* timer isrs are responsible for determining if they + * caused an interrupt */ + /* and clearing their own interrupt flags */ + if(tmr0_isr != 0) { tmr0_isr(); } + if(tmr1_isr != 0) { tmr1_isr(); } + if(tmr2_isr != 0) { tmr2_isr(); } + if(tmr3_isr != 0) { tmr3_isr(); } + } + if(bit_is_set(pending, INT_NUM_MACA)) { + if(maca_isr != 0) { maca_isr(); } + } + if(bit_is_set(pending, INT_NUM_UART1)) { + if(uart1_isr != 0) { uart1_isr(); } + } + if(bit_is_set(pending, INT_NUM_CRM)) { + PRINTF("crm irq\n\r"); + if(rtc_wu_evt() && (rtc_isr != 0)) { rtc_isr(); } + if(kbi_evnt(4) && (kbi4_isr != 0)) { kbi4_isr(); } + if(kbi_evnt(5) && (kbi5_isr != 0)) { kbi5_isr(); } + if(kbi_evnt(6) && (kbi6_isr != 0)) { kbi6_isr(); } + if(kbi_evnt(7) && (kbi7_isr != 0)) { kbi7_isr(); } + } + } } diff --git a/cpu/mc1322x/maca.c b/cpu/mc1322x/maca.c index 166480c..a91a49f 100644 --- a/cpu/mc1322x/maca.c +++ b/cpu/mc1322x/maca.c @@ -17,6 +17,8 @@ #define MAX_PACKET_SIZE 127 #endif +#define MACA_CLOCK_DIV 95 + void ResumeMACASync(int x); static process_event_t event_data_ready; @@ -146,22 +148,29 @@ static void decode_status(int status) { } } } -#undef PRINTF -#define PRINTF(...) +//#undef PRINTF +//#define PRINTF(...) + +static int radio_on = 0; -int maca_on(void) { - PRINTF("maca on\n\r"); +int maca_on(void) +{ + if (radio_on == 0) { + printf("turning phy on\n\r"); - /* turn the radio regulators back on */ - reg32(CRM_VREG_CNTL) = reg32(CRM_VREG_CNTL) | 0x00000078; + /* turn the radio regulators back on */ + reg32(CRM_VREG_CNTL) = reg32(CRM_VREG_CNTL) | 0x00000078; - /* reinitialize the phy */ - init_phy(); + /* reinitialize the phy */ + init_phy(); + radio_on = 1; + } return 1; } -int maca_off(void) { +int maca_off(void) +{ PRINTF("waiting to turn maca off"); while((reg32(MACA_STATUS) & 0x0000ffff) == maca_cc_not_completed) { PRINTF("."); @@ -173,6 +182,7 @@ int maca_off(void) { /* hold the maca in reset */ set_bit(reg32(MACA_RESET), maca_reset_rst); + radio_on = 0; return 1; } @@ -183,6 +193,8 @@ static int post_receive() { /* you will not receive anything without setting it */ reg32(MACA_TXLEN) = (MAX_PACKET_SIZE << 16); packet = list_head(rx_empty); + if (packet == NULL) + printf("### out of receive buffers #####\n"); reg32(MACA_DMARX) = (uint32_t)&packet->data[0]; /* with timeout */ reg32(MACA_SFTCLK) = reg32(MACA_CLK) - 1; @@ -214,12 +226,12 @@ int maca_read(void *buf, unsigned short bufsize) { #else offset = 1; #endif - PRINTF("maca read size %d: ", packet->length); + //PRINTF("maca read size %d: ", packet->length); for(i = offset; i <= packet->length; i++) { ((uint8_t *)buf)[i - offset] = packet->data[i]; - PRINTF(" %02x", packet->data[i]); + //PRINTF(" %02x", packet->data[i]); } - PRINTF("\n"); + //PRINTF("\n"); list_add(rx_empty, packet); return packet->length; @@ -229,19 +241,24 @@ int maca_send(const void *payload, unsigned short payload_len) { volatile uint32_t i, j; volatile uint32_t retry; volatile uint32_t len; - //struct packet_t *packet; + struct packet_t *packet; int status; - maca_on(); len = payload_len; /* wait for maca to finish what it's doing */ disable_irq(MACA); + + maca_on(); + + reg32(MACA_SFTCLK) = reg32(MACA_CLK) + 2; while(status_is_not_completed()) {}; + ResumeMACASync(1); + for (j = 0; j < 2300; j++) {} + led_red_on(); - ResumeMACASync(8); /* the mc1322x promiscuous mode doen't appear to be entirely promiscuous */ /* in MACA_RAW_MODE, all transmitted packets are prepended with MACA_RAW_PREPEND */ @@ -257,22 +274,22 @@ int maca_send(const void *payload, unsigned short payload_len) { PRINTF(" %02x", ((uint8_t *)payload)[i - 1]); } #else - PRINTF("maca: sending %d bytes\n", payload_len); + //PRINTF("maca: sending %d bytes\n", payload_len); for(i = 0; i < payload_len; i++) { /* copy payload into tx buf */ tx_buf[i] = ((uint8_t *)payload)[i]; - PRINTF(" %02x", ((uint8_t *)payload)[i]); + //PRINTF(" %02x", ((uint8_t *)payload)[i]); } #endif - PRINTF("\n\r"); + //PRINTF("\n"); /* set dma tx pointer to the payload */ /* and set the tx len */ reg32(MACA_TXLEN) = (uint32_t)(len + 2); reg32(MACA_DMATX) = (uint32_t)tx_buf; - //packet = list_head(rx_empty); - //reg32(MACA_DMARX) = (uint32_t)&packet->data[0]; + packet = list_head(rx_empty); + reg32(MACA_DMARX) = (uint32_t)&packet->data[0]; reg32(MACA_TMREN) = 0; /* do the transmit */ reg32(MACA_CONTROL) = ( (1 << maca_ctrl_prm) | @@ -284,10 +301,6 @@ int maca_send(const void *payload, unsigned short payload_len) { /* maybe wait until action complete instead? */ while (!action_complete_irq()) {}; reg32(MACA_CLRIRQ) = (1 << maca_irq_acpl); -status = reg32(MACA_STATUS) & 0x0000ffff; -decode_status(status); - - //ResumeMACASync(9); post_receive(); enable_irq(MACA); @@ -331,16 +344,11 @@ void maca_isr(void) { reg32(MACA_CLRIRQ) = (1 << maca_irq_acpl); status = reg32(MACA_STATUS) & 0x0000ffff; decode_status(status); - } i = reg32(MACA_IRQ); if (i != 0) printf("MACA IRQ %x\n", i); - //reg32(MACA_TXLEN) = (MAX_PACKET_SIZE << 16); - //packet = list_head(rx_empty); - //reg32(MACA_DMARX) = (uint32_t)&packet->data[0]; - post_receive(); } @@ -394,8 +402,6 @@ PROCESS_THREAD(maca_process, ev, data) /* internal mc1322x routines */ -#define MACA_CLOCK_DIV 95 - static uint8_t ram_values[4]; void init_phy(void)